/* Generated automatically by the program `genattr-common'
   from the machine description file `md'.  */

#ifndef GCC_INSN_ATTR_COMMON_H
#define GCC_INSN_ATTR_COMMON_H

enum attr_cpu {CPU_SH1, CPU_SH2, CPU_SH2E, CPU_SH2A, CPU_SH3, CPU_SH3E, CPU_SH4, CPU_SH4A};
enum attr_endian {ENDIAN_BIG, ENDIAN_LITTLE};
enum attr_fpu_single {FPU_SINGLE_YES, FPU_SINGLE_NO};
enum attr_fmovd {FMOVD_YES, FMOVD_NO};
enum attr_pipe_model {PIPE_MODEL_SH1, PIPE_MODEL_SH4};
enum attr_type {TYPE_MT_GROUP, TYPE_CBRANCH, TYPE_JUMP, TYPE_JUMP_IND, TYPE_ARITH, TYPE_ARITH3, TYPE_ARITH3B, TYPE_DYN_SHIFT, TYPE_LOAD, TYPE_LOAD_SI, TYPE_FLOAD, TYPE_STORE, TYPE_FSTORE, TYPE_MOVE, TYPE_MOVI8, TYPE_FMOVE, TYPE_SMPY, TYPE_DMPY, TYPE_RETURN, TYPE_PLOAD, TYPE_PRSET, TYPE_PSTORE, TYPE_PRGET, TYPE_PCLOAD, TYPE_PCLOAD_SI, TYPE_PCFLOAD, TYPE_RTE, TYPE_SFUNC, TYPE_CALL, TYPE_FP, TYPE_FPSCR_TOGGLE, TYPE_FDIV, TYPE_FTRC_S, TYPE_DFP_ARITH, TYPE_DFP_MUL, TYPE_FP_CMP, TYPE_DFP_CMP, TYPE_DFP_CONV, TYPE_DFDIV, TYPE_GP_FPUL, TYPE_FPUL_GP, TYPE_MAC_GP, TYPE_GP_MAC, TYPE_MAC_MEM, TYPE_MEM_MAC, TYPE_MEM_FPSCR, TYPE_GP_FPSCR, TYPE_CWB, TYPE_MOVUA, TYPE_FSRRA, TYPE_FSCA, TYPE_TLS_LOAD, TYPE_NIL, TYPE_OTHER};
enum attr_insn_class {INSN_CLASS_MT_GROUP, INSN_CLASS_EX_GROUP, INSN_CLASS_LS_GROUP, INSN_CLASS_BR_GROUP, INSN_CLASS_FE_GROUP, INSN_CLASS_CO_GROUP, INSN_CLASS_NONE};
enum attr_fp_mode {FP_MODE_SINGLE, FP_MODE_DOUBLE, FP_MODE_NONE};
enum attr_fp_set {FP_SET_SINGLE, FP_SET_DOUBLE, FP_SET_UNKNOWN, FP_SET_NONE};
enum attr_short_cbranch_p {SHORT_CBRANCH_P_NO, SHORT_CBRANCH_P_YES};
enum attr_med_branch_p {MED_BRANCH_P_NO, MED_BRANCH_P_YES};
enum attr_med_cbranch_p {MED_CBRANCH_P_NO, MED_CBRANCH_P_YES};
enum attr_braf_branch_p {BRAF_BRANCH_P_NO, BRAF_BRANCH_P_YES};
enum attr_braf_cbranch_p {BRAF_CBRANCH_P_NO, BRAF_CBRANCH_P_YES};
enum attr_needs_delay_slot {NEEDS_DELAY_SLOT_YES, NEEDS_DELAY_SLOT_NO};
enum attr_banked {BANKED_YES, BANKED_NO};
enum attr_hit_stack {HIT_STACK_YES, HIT_STACK_NO};
enum attr_interrupt_function {INTERRUPT_FUNCTION_NO, INTERRUPT_FUNCTION_YES};
enum attr_in_delay_slot {IN_DELAY_SLOT_YES, IN_DELAY_SLOT_NO};
enum attr_cond_delay_slot {COND_DELAY_SLOT_YES, COND_DELAY_SLOT_NO};
enum attr_dfp_comp {DFP_COMP_YES, DFP_COMP_NO};
enum attr_late_fp_use {LATE_FP_USE_YES, LATE_FP_USE_NO};
enum attr_any_fp_comp {ANY_FP_COMP_YES, ANY_FP_COMP_NO};
enum attr_any_int_load {ANY_INT_LOAD_YES, ANY_INT_LOAD_NO};
enum attr_highpart {HIGHPART_USER, HIGHPART_IGNORE, HIGHPART_EXTEND, HIGHPART_DEPEND, HIGHPART_MUST_SPLIT};
#define INSN_SCHEDULING
#define DELAY_SLOTS 1

#endif /* GCC_INSN_ATTR_COMMON_H */
